Capacitors are utilized in numerous semiconductor structures. For instance, capacitors can be coupled with transistors to form dynamic random access memory (DRAM) cells. A continuing goal in semiconductor device fabrication is to shrink the spacing between adjacent devices, and therefore enable an increasing number of devices to be formed within the same amount of semiconductor wafer real estate. A problem that can occur when spacing between adjacent capacitor structures is reduced is that various conductive components of the adjacent structures can extend across a gap between the structures, and ultimately cause an electrical short from one structure to an adjacent structure. Such electrical short can alter electrical characteristics associated with the capacitor structures, and even render the structures inoperable.
It would be desirable to develop new capacitor structures designed for relatively tight packing between adjacent structures; and it would be further desirable to develop methodologies for forming such structures.